1. Field of the Invention
The present invention relates to the remapping of the physical addresses of a computer memory without affecting the logical addresses in use by executing programs. It is particularly useful when an interleaved memory is employed since it preserves the interleaved nature of the system.
2. Description of the Prior Art
Many computer systems employ an addressing scheme in which the actual physical addresses in the computer memory are hidden from the operating system or user programs. In such systems the executing programs view the memory as a sequential set of integers ranging from 0 to N. However, these integers may not be used directly to reference memory. Instead, the addresses used by the programs provide an indirect reference to memory. This indirect reference is known as a logical address. The memory management system has a means of associating a logical address with the actual physical address. In one embodiment a table is maintained to convert a logical address to the actual physical address.
It is sometimes desirable to change, or reconfigure, the actual physical location of the memory in use. It is also desirable to do so without adversely affecting the currently executing programs. Doing so would involve moving, or remapping, the physical location of the data while maintaining the integrity of the logical addresses in use by executing programs.
Some computer systems also employ what is known as an interleaved memory system to implement the physical layout of the data in memory. An interleaved memory spreads out the data for a given unit of information across the physical memory such that the unit of information may be accessed in a fewer number of read requests.
A common implementation is one where the unit of information is some number of sixteen bit words and only one word of information can be accessed from a memory module with a single read request. If sequential logical addresses were located in the same memory module, it would take more than one read request to access the sequential logical words.
In an interleaved memory, the sequential logical word addresses would be spread out across numerous memory modules to reduce the number of read requests to access the group of words. Ideally, the sequential logical words would be spread out across a number of memory modules equal to the maximum number of words the processor will request in a single read request. In that case, a single read issued simultaneously to all the memory modules in use would yield the entire number of words the processor requested in one read cycle.
Since an interleaved memory is physically organized as described above, the management of logical addresses becomes more complex because sequential logical addresses do not correspond to a contiguous set of physical addresses.
Previous implementations of an interleaved memory were restricted in their ability to dynamically reconfigure their physical layout. They were restricted to only using the actual physical memory with which they were initially configured. In general, the size of the interleaved memory was limited to the size of the memory initially configured.
While it may have been possible to add additional memory to the memory system, this memory would not be interleaved but would be managed separately. Physical memory could not be removed from an interleaved memory system.
The only method to move the physical location of the interleaved memory, or to shrink or expand the size of the interleaved memory, was to reinitialize the entire memory system. This is time consuming. All the data that was in memory, possibly including critical structures that may take time to reconstruct, is destroyed. The cost of doing so tends to discourage reconfiguration and cause systems to run with a less than optimal memory configuration. Additionally, if a portion of physical memory in use in an interleaved scheme is encountering problems, the entire memory system had to be reinitialized as described above to remove the problem memory from the system.